DLC PART B QUESTIONS

Anna University
DIGITAL LOGIC CIRCUITS
EEE Department
Semester 4
IMPORTANT QUESTIONS FROM PART
B :
UNIT -1

1. Problem from Quine Mc-Cluskey
method (16)

2. Problem from Code converters (16)

3. Design (or) implementation of
multiplexer ,de-multiplexer circuits
(each 8)

4. Problem from designing the
combinational circuits. (16)

5. problem from simplification and
implementation of SOP and POS
functions using gates (8)

unit -2
1. problems from realisation of
SR,D,T,JK flip flops (8)

2. problems from analysis of
synchronous sequential circuits (16)

3. problems from design of
synchronous sequential circuits using
flip flop(16)

4. design of counters (12)

unit -3
1. problems of analysis of
asynchronous sequential circuits (16)

2. problems of design of
asynchronous sequential circuits (16)

unit-4
1. draw the TTL inverter circuits (12)

2. explain the working of 2 input and
3 input TTL totem pole NAND gate .
(16)

3. explain the concept of
concept ,operation and characteristics
of CMOS family. Draw the circuit of
CMOS two input NAND gate and
explain its operation (16)

4. draw the circuit of CMOS using
NAND and NOR gates (6)

5. write a note on ROM and its type
(16)

6. problem from designing a ROM
circuits (8)

7. problem from implementing the
Boolean function with the PLA (12)

unit -5

1. explain the design procedure of
RTL design using VHDL (16)

2. write the note on test benches and
its types (8)

3. program using VHDL code can be
asked (16)

(example : mod 16, full adder, half
adder, counters, multiplexers, de-
multiplexer etc.)

Tips :
· be knowledgeable with all gates and
flip flop truth tables.
· Especially be knowledgeable in
excitation table of all flip flop so that u
can attend part A and B question of
unit 2 and 3.
· Be knowledgeable in steps of
design and analysis of both
synchronous and asynchronous
sequential circuits... sometimes it
can be asked as a 16 mark question.
· Be knowledgeable in Boolean
function i.e expression for half adder,
full adder, parity generator, code
convertor etc.......